A Quantum Orchestra in Perfect Tune: Fidelity Above 99.9% ✛

Original: "Above 99.9% Fidelity Single-Qubit Gates, Two-Qubit Gates, and Readout in a Single Superconducting Quantum Device"
arXiv:2508.16437 · 2025-08-22 · CC BY 4.0 · 3 min
A single superconducting chip simultaneously performs single- and two-qubit operations and reads out the result with fidelity above 99.9%.

Context

This work joins a dense series of recent achievements in superconducting quantum processors: fast readouts in 68 nanoseconds, entanglement of 120 qubits, control at 4 Kelvin, and quantum bridges between atoms have all been demonstrated nearby. They each solve individual tasks, but here, for the first time, three main operations are simultaneously brought together on a single device with fidelity above 99.9%. This is important because quantum error correction requires the whole set: fast single-qubit gates, precise two-qubit gates, and readout that does not destroy the quantum state.

Methods

The device consists of two superconducting transmon qubits connected through a tunable coupler. First, gate errors were numerically simulated as a function of qubit–cooler coupling strength, and an optimum was found around 75 MHz. Then a chip was fabricated with an actual coupling strength of 66 MHz. For fine-tuning the two-qubit CZ gate, a new protocol called PALEA was developed: after each gate, a layer of dynamical decoupling is added, and the signal is averaged over random phases, which amplifies only the target leakage error. Readout was optimized using shelving, which transfers the excited state to a higher level before measurement to extend its lifetime.

Results

The average CZ gate fidelity over 40 hours was 99.93%, and the minimum was 99.951%. Single-qubit gates reach 99.98% fidelity, and readout reaches 99.94%. The PALEA protocol reduced leakage to the |02⟩ state by at least a factor of two compared to the standard error amplification method. The total error budget of the system is estimated at 2.1 × 10⁻³, dominated by incoherent errors due to finite qubit lifetime (T₁ around 100 μs).

Implications

Unlike neighboring works that optimized only one operation or used a different type of coupling, here a holistic approach is demonstrated: simultaneous optimization of all three operations on a single chip. The new PALEA protocol provides a way to quickly and accurately calibrate leakage, which can be integrated into automated tuning procedures. This lowers the barrier to scaling, as calibration remains accurate even as the number of qubits grows.

Future development

The next step could be transferring this architecture to a two-dimensional qubit lattice with four connections per qubit. Also promising is improving qubit coherence times, which would allow further reducing the optimal coupling strength and decreasing crosstalk. For readout, shelving to the third excited state could be used to further increase fidelity.

Impact

The results are directly applicable to building scalable quantum processors for error correction, especially for surface codes. The PALEA protocol can be used in other superconducting platforms for precise calibration of two-qubit gates.

Next steps

Verify reproducibility of the results on multi-qubit devices with the same architecture. Integrate PALEA into a fully automated calibration cycle and study its performance under various noise levels.

Key open problems

For quantum error correction, the problem of simultaneously maintaining low leakage and high readout fidelity mid-computation remains unsolved. Here it is shown that shelving increases fidelity but also increases leakage, while QND-optimized readout reduces leakage but sacrifices fidelity. Finding a compromise between these requirements remains an open challenge.

The knowledge machine's view

This section is addressed to the author of the paper and their colleagues. Neighbouring works were found by meaning-based search across our archive, not by word overlap. We do not review: we show the field around the work.

What the work does

This work demonstrates simultaneous achievement of fidelities above 99.9% for single-qubit gates, a two-qubit CZ gate, and readout on a superconducting device with two transmons and a tunable coupler. A protocol named PALEA was developed for precise calibration of leakage to the |02⟩ state, which halved this error. The qubit–cooler coupling strength was optimized to balance errors, and the architecture was shown to be compatible with scaling to two-dimensional lattices.

Where its strength is

A holistic approach: for the first time, three key operations are simultaneously brought to fidelities above 99.9% on a single device, which is important for quantum error correction. The new PALEA protocol provides a fast and accurate method for leakage calibration, suitable for automation and scaling.

Where it could go next

Worth trying

  • Test the PALEA protocol on a larger number of qubits and for other gate types to verify its scalability and universality.
  • Integrate automatic calibration methods from neighboring works to reduce setup time and improve parameter stability over time.
  • Investigate the possibility of applying shelving to two-qubit states to reduce readout errors in multi-qubit systems.

Why this may matter

Simultaneously achieving high fidelity for all major operations on a single device is an important step toward practical quantum error correction. The developed leakage calibration protocol could become a standard tool in tuning superconducting quantum processors, lowering barriers to scaling.

The PALEA protocol uses averaging over random phases, making it similar to randomized benchmarking, but here it is applied to calibrate a specific gate error rather than to estimate overall fidelity.

Key numbers

  • single-qubit gate fidelity: 99.98%
  • two-qubit CZ gate fidelity: 99.93%
  • readout fidelity: 99.94%
  • CZ gate averaging time: 40 hours
  • total system error: 2.1 × 10⁻³
Scientists
Niels BohrPascual JordanWerner HeisenbergDavid DeutschErwin SchrödingerJohn Stewart Bell
Concepts
fidelity readout single qubit operation quantum gate tuning fault tolerant quantum computer error threshold charge qubit superconducting electronics gate voltage coupling strength error rate computational power semiconductor qubits superconducting wire flux quantization scalable quantum computer superconducting qubit classical limit